With an increasing amount of communication data in a communication network as a result of a widespread use of the Internet etc., a configuration of a large capacity photonic network has been earnestly demanded. In the present photonic network, communications based on 10 Gb/s are dominant, and an optical transmitter/receiver for higher speed communications such as one based on 40 Gb/s is required for a larger capacity. To realize a higher speed optical transmitter/receiver, a higher speed drive circuit and a higher speed amplification circuit are required.
For a conventional high-speed amplification circuit, a source grounded amplification circuit has been widely used with a shunt inductor inserted in series with a load resistor. FIG. 1 is an example of a configuration of a 2-stage source grounded amplification circuit. The 2-stage source grounded amplification circuit illustrated in FIG. 1 includes resistors 101 and 104, inductors 102 and 105, and transistors 103 and 106. The resistors 101 and 104 are load resistors, and the inductors 102 and 105 are shunt inductors.
The resistor 101, the inductor 102, and the transistor 103 configure an amplifier in the first stage. One terminal of the resistor 101 is connected to a power supply potential VDD, and the inductor 102 is connected to the other terminal in series. The inductor 102 is connected to the drain of the transistor 103, and the source of the transistor 103 is connected to a grounding potential.
The resistor 104, the inductor 105, and the transistor 106 configure an amplifier in the second stage. One terminal of the resistor 104 is connected to the power supply potential VDD, and the inductor 105 is connected to the other terminal in series. The inductor 105 is connected to the drain of the transistor 106, and the source of the transistor 106 is connected to the grounding potential. By adding the amplifier in the second stage, the amplification rate can be higher than in the configuration of only the amplifier in the first stage.
The drain of the transistor 103 in the first stage is connected to the gate of the transistor 106 in the second stage at the point A. An input signal is supplied to the gate of the transistor 103, and an output signal of the amplifier in the first stage is output to the point A from the drain of the transistor 103, and the output signal of the amplifier in the second stage is output from the drain of the transistor 106.
By using the structure illustrated in FIG. 1, the degradation of the gain of a high frequency signal can be compensated for by the inductors 102 and 105. Therefore, the amplification band can be enlarged toward a high frequency area, and the characteristic of a high frequency signal can be improved.
Also well known is a differential amplification circuit having each inductor between the drain of a differential transistor and a gate grounded transistor, between a load resistor and a power supply, and between the source of a source follower transistor and an output terminal.
Furthermore known is a high-frequency amplifier for input matching for two frequencies by inserting two coils into an input matching circuit.
Another high-speed amplification circuit can be a distribution constant amplification circuit. FIG. 2 is an example of a configuration of a distribution constant amplification circuit. The distribution constant amplification circuit illustrated in FIG. 2 includes a pre-driver 201, differential amplifiers 202-1 through 202-6, resistors 203 through 206, and 211 through 214, input transmission lines 207 and 208, and output transmission lines 209 and 210.
The resistors 205 and 206 are load resistors, the resistors 211 and 212 are terminator resistors respectively included in the input transmission lines 207 and 208, and the resistors 213 and 214 are terminator resistors respectively included in the output transmission lines 209 and 210. A signal input to the pre-driver 201 is supplied to the differential amplifiers 202-1 through 202-6 through the input transmission lines 207 and 208, and an amplified signal is output through the output transmission lines 209 and 210. Using the above-mentioned distribution constant amplification circuit, a constant gain can be obtained over a broad band.
Patent Document 1: Japanese Laid-open Patent Publication No. 2005-073234
Patent Document 2: Japanese Laid-open Patent Publication No. 10-242776
Non-patent Document 1: Yves Baeyens et al., “High Gain-Bandwidth Differential Distributed InP D-HBT Driver Amplifiers with Large (11.3 Vpp) Output Swing at 40 Gb/s”, IEEE Journal of Solid State Circuits, Vol. 39, No. 10, October 2004, pp. 1697-1705.